Desktop Management Interface DMI

DMI generates a standard framework for managing and tracking components in a desktop pc, notebook or server. DMI was the first desktop management standard.
The DMI Home Page is a repository of all DMI-related information from the specification to tools to support to the Product Registry of DMI-certified products. Due to the rapid advancement of DMTF technologies, such as CIM, DMTF defined an end of life  process for its Desktop Management Interface (DMI), which concluded March 31, 2005.

In computing, Direct Media Interface (DMI) is Intel's proprietary link between the Northbridge and southbridge on a computer motherboard. It was first used between the 9xx chipsets and the ICH6, released in 2004. Previous Intel chipsets had used the Hub Interface to perform the same function, and server chipsets use a similar interface called Enterprise Southbridge Interface (ESI).^[1]

While the "DMI" name dates back to ICH6, Intel mandates specific combinations of compatible devices, so the presence of a DMI interface does not guarantee by itself that a particular Northbridge–Southbridge combination is allowed.

DMI shares many characteristics with PCI Express, using multiple lanes and differential signaling to form a point-to-point link. Most implementations use a ×4 link, while some mobile systems (e.g. 915GMS, 945GMS/GSE/GU and the Atom N450) use a ×2 link, halving the bandwidth. The original implementation provides 10 Gbit/s in each direction using a ×4 link.

DMI 2.0, introduced in 2011, doubles the data transfer rate to 2 GB/s with a ×4 link. It is used to link an Intel CPU with the Intel Platform Controller Hub (PCH), which supersedes the historic implementation of a separate Northbridge and Southbridge.^[2]:14

DMI 3.0, released in August 2015, allows the 8 GT/s transfer rate per lane, for a total of four lanes and 3.93 GB/s for the CPU–PCH link. It is used by two-chip variants of the Intel Skylake microprocessors, which are used in conjunction with Intel 100 Series chipsets;^[3][4] some variants of Skylake will have the PCH integrated into the die, effectively following the system on a chip (SoC) design layout.^[5] On 9 March 2015, Intel announced the Broadwell-based Xeon D as its first platform to fully incorporate the PCH in an SoC configuration.^[6]

Implementations

Northbridge devices supporting a northbridge DMI are the Intel 915-series, Intel 925-series, Intel 945-series, Intel 955-series, Intel 965-series, Intel 975-series, Intel G31/33, Intel P35, Intel X38, Intel X48, Intel P45, and Intel X58.

Processors supporting a northbridge DMI and, therefore, not using a separate northbridge, are the Intel Atom, Intel Core i3, Intel Core i5, and Intel Core i7 (8xx, 7xx and 6xx, but not 9xx). Processors supporting a northbridge DMI 2.0 and, therefore not using a separate northbridge, are the 2000, 3000, 4000, 5000 and 6000 series of the Intel Core i3, Intel Core i5 and Intel Core i7.

Southbridge devices supporting a southbridge DMI are the ICH6, ICH7, ICH8, ICH9, ICH10, NM10, Intel P55, Intel H55, Intel H57, Intel Q57, Intel PM55, Intel HM55, Intel HM57, Intel QM57, and Intel QS57.